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June 1997
NDS336P P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
SuperSOTTM-3 P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics, and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package.
Features
-1.2 A, -20 V, RDS(ON) = 0.27 @ VGS= -2.7 V RDS(ON) = 0.2 @ VGS = -4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.0V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface package. Mount
________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source Voltage
T A = 25C unless otherwise noted
NDS336P -20 8
(Note 1a)
Units V V A
Gate-Source Voltage - Continuous Maximum Drain Current - Continuous - Pulsed Maximum Power Dissipation
(Note 1a) (Note 1b)
-1.2 -10 0.5 0.46 -55 to 150
W
Operating and Storage Temperature Range
C
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
250 75
C/W C/W
(c) 1997 Fairchild Semiconductor Corporation
NDS336P Rev. E
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSS IGSS VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A VDS = -16 V, VGS = 0 V TJ =55C Gate - Body Leakage Current Gate - Body Leakage Current VGS = 8 V, VDS = 0 V VGS = -8 V, VDS = 0 V VDS = VGS, ID = -250 A TJ =125C Static Drain-Source On-Resistance VGS = -2.7 V, ID = -1.2 A TJ =125C VGS = -4.5 V, ID = -1.3 A ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current Forward Transconductance VGS = -2.7 V, VDS = -5 V VDS = -5 V, ID = -1.2 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz -2 -3 -0.5 -0.3 -0.78 -0.58 0.22 0.34 0.16 -20 -1 -10 100 -100 V A A nA nA
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage -1 -0.8 0.27 0.49 0.2 A S V
DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 360 170 60 pF pF pF
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -10 V, ID = -1.2 A, VGS = -4.5 V VDD = -5 V, ID = -1 A, VGS = -4.5 V, RGEN = 6 8 29 33 23 5.7 0.7 1.8 15 50 60 45 8.5 ns ns ns ns nC nC nC
NDS336P Rev. E
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS ISM VSD Maximum Continuous Source Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.42 (Note 2) -0.65 -0.42 -10 -1.2 A A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solde mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
PD (t) =
T J -T A R JA(t)
=
T J -T A R JC +R CA(t)
= I 2 (t) x R DS(ON)@T J D
Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper. b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.
1a
1b
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDS336P Rev. E
Typical Electrical Characteristics
-10 I D , DRAIN-SOURCE CURRENT (A) 2
GS
-3.5
R DS(on) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
= -4.5V
-4.0
1.8 1.6
-8
V GS=-2.0V -2.5
-3.0 -2.7 -2.5
-6
1.4 1.2 1 0.8 0.6
-2.7 -3.0 -3.5 -4.0 -4.5
-4
-2.0
-2
0
0
-1 V
DS
-2
-3
-4
-5
0
-2
-4
-6
-8
-10
, DRAIN-SOURCE VOLTAGE (V)
I D , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.6 DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE
2
R DS(ON), NORMALIZED
1.4
ID = -1.2A V = -2.7V
GS
VGS = -2.7V
1.8 1.6 1.4
R DS(on) , NORMALIZED
TJ = 125C 25C
1.2
1
1.2
-55C
1 0.8 0.6
0.8
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
0
-2
-4 -6 I , DRAIN CURRENT (A)
D
-8
-10
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Drain Current and Temperature.
-5
1.2 V DS = -5V T = -55C J GATE-SOURCE THRESHOLD VOLTAGE -25C VGS(th) , NORMALIZED -125C 1.1 1 0.9 0.8 0.7 0.6 -50
-4
VDS = VGS I D = -250A
I D , DRAIN CURRENT (A)
-3
-2
-1
0 -0.5
-1 V
GS
-1.5
-2
-2.5
-3
-25
, GATE TO SOURCE VOLTAGE (V)
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with Temperature.
NDS336P Rev. D
Typical Electrical Characteristics (continued)
1.06
5
D
DRAIN-SOURCE BREAKDOWN VOLTAGE
-I S , REVERSE DRAIN CURRENT (A)
I
1.04
= - 250A
V GS = 0V
1
BV DSS , NORMALIZED
T J = 125C
0.1
1.02
25C
0.01
1
-55C
0.98
0.001
0.96 -50
-25
0 T
J
25
50
75
100
125
150
0.0001 0.2
, JUNCTION TEMPERATURE (C)
0.4 0.6 0.8 1 -V SD , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 7. Breakdown Voltage Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature.
800 -VGS , GATE-SOURCE VOLTAGE (V) 500 CAPACITANCE (pF)
5
I D = -1.2A
4
VDS = -5V -15V
-10V
Ciss
300 200
3
Coss
2
100 60 40 0.1
f = 1 MHz V GS = 0V
0.2 0.5 1 2 5 -VDS , DRAIN TO SOURCE VOLTAGE (V)
Crss
1
0 10 20 0 2 4 Q g , GATE CHARGE (nC) 6 8
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
VDD
t d(on)
ton
t off tr
90%
t d(off)
90%
VIN
D
RL V OUT
VOUT
10%
tf
VGS
R GEN
10% 90%
G
DUT
S
V IN
10%
50%
50%
PULSE WIDTH
INVERTED
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDS336P Rev. D
Typical Electrical Characteristics (continued)
gFS, TRANSCONDUCTANCE (SIEMENS) 8 20
V DS= -5V
6
TJ = -55C
-I D , DRAIN CURRENT (A)
10 5 2 1 0.5
R (O DS N) LIM IT
100 us 1m s
10m s 100 ms 1s DC
-25C
4
-125C
0.1 0.05
2
V GS = -2.7V SINGLE PULSE RJA = See Note 1b TA = 25C
0.2 0.5 1 2
0 0 -2
D
-4
-6
-8
-10
0.01 0.1
5
10
20
30
I , DRAIN CURRENT (A)
-V DS , DRAIN-SOURCE VOLTAGE (V)
Figure 13. Transconductance Variation with Drain Current and Temperature.
Figure 14. Maximum Safe Operating Area.
STEADY-STATE POWER DISSIPATION (W)
0.8
-ID , STEADY-STATE DRAIN CURRENT (A)
1
1.6
1.4
0.6
1b
1a
1.2
1a
0.4
1b
0.2
4.5"x5" FR-4 Board o TA = 25 C Still Air
1
4.5"x5" FR-4 Board o TA = 25 C Still Air VGS = -2.7V
0 0 0.1 0.2 0.3 0.4 2oz COPPER MOUNTING PAD AREA (in2 )
0.8 0 0.1 0.2 0.3 0.4
2 2oz COPPER MOUNTING PAD AREA (in )
Figure 15. SuperSOTTM _ 3 Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area.
Figure 16. Maximum Steady-State Drain Current versus Copper Mounting Pad Area.
1
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001
D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse
R JA (t) = r(t) * R JA R JA = See Note 1b
P(pk)
t1
t2
TJ - TA = P * R JA (t) Duty Cycle, D = t1 /t2
0.001
0.01
0.1 t 1 , TIME (sec)
1
10
100
300
Figure 17. Transient Thermal Response Curve.
Note : Characterization performed using the conditions described in note 1b. Transient thermal response will change depending on the circuit board design.
NDS336P Rev. D

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